In array substrates of liquid crystal display devices, organic light emitting diode (OLED) display devices or the like, gate lines may be controlled by gate driving circuits (GOA). A gate driving circuit comprises a plurality of cascaded shift registers, which are controlled via clock signals of one or more pulses. Where, the output terminal of each level of shift register is connected to a gate line, and is connected to the input terminal of its next level of shift register, and when a certain level of shift register outputs an ON voltage, it will also trigger the next level of shift register so that the next level of shift register outputs an ON voltage in the next moment, thereby achieving the purpose of alternate ON of each gate line.
In an existing shift register, the output of signal is controlled by a transistor, and the gate of the transistor is directly or indirectly controlled by a clock signal. Since the transistor is not the ideal device and has parasitic capacitance and other issues, the pulse of the clock signal on its gate will cause unstable outputs of the shift register.